概要
説明
The HXC44400 is a uni-directional Quad Channel PAM-4 CDR / Retimer for retiming data rates from 51GS/s to 56GS/s. It is optimized for 100Gbps Ethernet, OIF CEI-56G-VSR applications with low power consumption of sub-250mW per channel (56Gbps).
The HXC44400 provides programmable and adaptive equalization in the receiver and programmable de-emphasis in the transmitter to compensate for channel Insertion Loss and ISI. In the receive direction, the programmable / adaptive CTLE provides up to 7 dB of equalization and a 1-tap DFE provides additional compensation. In the transmit direction, the programmable, 4-bit, de-emphasis with 3-tap FIR (pre,main,post) filter provides a 9 dB control range.
Auto DC-offset calibration is complemented with auto phase calibration and the unique CDR / Retimer architecture enables independent receive and transmit CDR loop bandwidth optimization for increased Jitter Tolerance and reduced Jitter Transfer performance.
Able to be used with or without a reference clock with a built-in, single 14GHz master VCO providing the oscillator output for each channel.
Multiple Built in Self-Test (BIST) functions such as a PRBS generator / checker, Jitter Tolerance, Eye Open Monitor, and single lane loopback are supported for module level testing.
The HXC44400 has an I2C interface that is used to set the start-up operating mode for the internal state machine, which performs all required calibrations and settings. The HXC44400 is packaged in a 5x5mm BGA in a 9×9 grid of 0.5mm pitch.
特長
- Quad 51 – 56.2GS/s PAM-4 CDR / Retimer
- Programmable 3-tap output de-emphasis for transmit
- Adaptive linear equalizer and decision-feedback equalizer (DFE) to cover up to 14dB lossy channel in receiver
- Low sensitivity of and adjustable threshold level of data sampler
- Reference-less and Master channel-less operation
- Independent, adaptive bandwidth control in RX CDR for optimum jitter tolerance
- Programmable output swing up to 800mVpp
- Internal and automatic DC and phase offset calibrations
- On-chip testability; EOM, JTOL, PRBS generator/checker, local/remote loopback,
- Polarity (P/N) inversion
- I2C control interface
製品比較
アプリケーション
設計・開発
モデル
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ビデオ&トレーニング
Watch an overview of the industry’s first CMOS-based PAM4 CDR solutions, HXT14450 50G/lane PAM4 integrated CDR with VCSEL driver and HXR14450 TIA designed for 200 Gb/s and 400 Gb/s transceivers and AOCs (active optical cables) in datacenters. The series features significantly lower power and smaller size compared with traditional DSP solutions, as well as higher integration – including an integrated MCU – to further simplify system design.