TW8830

特長

• NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N combination), PAL (60), SECAM with automatic format detection
• Three 10-bit ADCs and analog clamping circuit
• Fully programmable static gain or automatic gain control for the Y or CVBS channel
• Programmable white peak control for the Y or CVBS channel
• Software selectable analog inputs
• High quality adaptive 2D comb filter for both NTSC and PAL inputs
• PAL delay line for color phase error correction
• Image enhancement with 2D dynamic peaking and CTI
• Digital sub-carrier PLL for accurate color decoding
• Digital horizontal PLL and Advanced synchronization processing for VCR playback and weak signal performance
• Programmable hue, brightness, saturation, contrast and sharpness
• High quality horizontal and vertical filtered down scaling with arbitrary scale-down ratio
• Triple High-Speed 10-bit ADCs with clamping and programmable gain amplifier.
• SOG and H/V sync support for YPbPr or RGB input
• Built-in line locked PLL with sync separator
• Supports analog input resolution up to 1080i or WXGA DIGITAL INPUTS SUPPORT
• Supports BT.656 video formats
• Built-in programmable timing controller
• Supports 3, 4, 6 or 8 bits per pixel up to 16.8 million colors with built-in dithering engine
• Supports digital panel up to WVGA/SVGA resolution
• Supports Serial (8-bit) RGB panel
• 6912 byte programmable font RAM and 256 display RAM
• Four windows font OSD with bordering / shadowing
• 1/2/3/4 bits/pixel
• Supports variable width (12/16), height (2~32)
• High quality scaler with both up/down and nonlinear scaling support
• Panorama / Water-glass scaling
• Built-in 2D de-interlacing function
• Programmable hue, brightness, saturation, contrast and sharpness
• Programmable cropping of input video and graphics
• Independent RGB gain and offset controls
• Panorama / Water-glass scaling
• Programmable 8-bit Gamma correction for each color
• Operated in Frame Sync mode
• Black/White Stretch
• Spread spectrum clock
• Modulation frequency and spread width are selectable
• Supports programmable timing interface signals for control
• Column (source) driver / row (gate) driver MCU
• Industry standard 8052 based
• Code fetch from external SPI flash memory
• 512B XDATA memory
• Supports functional based independent power down
• 1.8 / 3.3 V operation
• Supports 2-wire serial bus interface
• Built-in 2 channel Auxiliary ADC input
• Single 27MHz crystal
• 80-pin LQFP package

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