概要
説明
The 8P34S2108 is a high-performance, low-power, differential dual 1:6 LVDS output 1.8V/2.5V fanout buffer. The device supports fail-safe operation and is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has eight low skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S2108 ideal for those clock distribution applications demanding well-defined performance and repeatability. The device is characterized to operate from a 1.8V/2.5V power supply. The integrated bias voltage references enable easy interfacing of AC-coupled signals to the device inputs.
特長
- Dual 1:8 low skew, low additive jitter LVDS fanout buffers
- Matched AC characteristics across both channels
- High isolation between channels
- Low power consumption
- Both differential CLKA, nCLKA and CLKB, nCLKB inputs accept
LVDS, LVPECL and single-ended LVCMOS levels - Maximum input clock frequency: 2GHz
- Output amplitudes: 350mV, 500mV (selectable)
- Output bank skew: 10ps typical
- Output skew: 20ps typical
- Low additive phase jitter, RMS: <45fs typical,
(fREF = 156.25MHz, 12kHz - 20MHz) - Full 1.8V / 2.5V supply voltage mode
- Lead-free (RoHS 6), 48-lead VFQFN packaging
- -40°C to 85°C (Tc ≤ 105°C) operating temperature range
製品比較
アプリケーション
設計・開発
モデル
ECADモデル
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ビデオ&トレーニング
Description
Transcript
ニュース&ブログ
IDT、高性能、低消費電力を提供する、デュアルチャネル バッファ製品で 1.8VのRFタイミングファミリを拡充 | ニュース | 2016年11月28日 |