Processing table
Function |
Outputs (#) |
Output Type |
Output Freq Range (MHz) |
Input Freq (MHz) |
Inputs (#) |
Input Type |
Output Banks (#) |
Core Voltage (V) |
Output Voltage (V) |
Divider Value |
Output Skew (ps) |
Additive Phase Jitter Typ RMS (fs) |
Pkg. Dimensions (mm) |
Temp. Range |
Pkg. Type |
Lead Count (#) |
105°C Max. Case Temp. |
Price (USD) | 1ku |
|
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
型名 | |||||||||||||||||||
Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs | Buffer, Divider | 8 | CML, HCSL, LVDS, LVPECL | 0.000001 - 700 | 0.000001 - 700 | 2 | LVCMOS, LVDS, LVHSTL, LVPECL | 2 | 1.8, 2.5, 3.3 | 1.5, 1.8, 2.5, 3.3 | 2, 511 | 100 | 60 | 5.0 x 5.0 x 0.9 | -40 to 85°C | VFQFPN | 32 | 4.037 |
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