FemtoClock™ 2 Evaluation Kit
This is the evaluation kit for the RC32514A and RC22514A. The board will come populated with an RC32514. The RC22514 is functionally a subset of the RC32514A, so this...
主要ドキュメント:
概要
説明
The RC32514A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC, or FPGA that requires several reference clocks with a jitter performance of less than 100fs. The RC32514A can act as a frequency synthesizer to locally generate the reference clock, a jitter attenuator to perform local clean-up, and/or frequency translation of a centrally-supplied reference, a synchronous Ethernet equipment clock to perform passband filtering and clean-up of network-supplied references or as a digitally controlled oscillator (DCO) for frequency margining or OTN clock applications. It contains an internal crystal that can be leveraged as the frequency reference for the onboard PLL if desired.
特長
- Jitter below 100fs RMS (10kHz to 20MHz)
- Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)
- PLL core consists of fractional-feedback Analog PLL (APLL) which can optionally be steered by a Digital PLL (DPLL)
- Operates from an internal crystal
- APLL frequency independent of input/crystal frequency
- Operates as a frequency synthesizer, jitter attenuator, synchronous equipment slave clock or Digitally Controlled Oscillator (DCO)
- DPLL loop filter programmable from 0.1Hz to 12kHz
- DCO has a tuning granularity of < 1ppb
- Programmable input buffer supports HCSL, LVDS, or two LVCMOS with no external terminations needed
- Input frequencies: 1MHz to 800MHz (250MHz for LVCMOS)
- Reference monitor qualifies/disqualifies input clock
- Programmable status output
- 4 differential/8 LVCMOS outputs
- Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
- Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or two LVCMOS
- Differential output swing is selectable: 400mV to 800mV
- Output clock phase individually adjustable in 100ps steps
- Output Enable input with programmable effect
- Supports up to 1MHz I²C or up to 20MHz SPI serial processor port
- Can configure itself automatically after reset through internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations
- 4mm × 4mm 28-VFQFPN package
製品比較
アプリケーション
設計・開発
ソフトウェア／ツール
ソフトウェア／ツール
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Software type
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会社名
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| Renesas IC Toolbox (RICBox) Renesas IC Toolbox（RICBox）ソフトウェアプラットフォームは、ソフトウェアを実行するコンピュータに接続することで、評価キット上のルネサスデバイスをお客様が設定することを可能にします。
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Software Package | ルネサス |
1件
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ボード＆キット
モデル
ECADモデル
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Processing table
| VFQFPN | 28 | -40 to +85°C | I | Yes | Tray | 3 | サンプルを入手, | |
| VFQFPN | 28 | -40 to +85°C | I | Yes | Reel | 3 |
Tips for Using This Parametric Table:
- Hide Filters button in header: Collapse or expands filters
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ビデオ&トレーニング
Lab on the Cloud Demo for FemtoClock®2 Ultra-Low Phase Noise Synthesizer and Jitter Attenuator
Demonstration of Renesas’ Lab on the Cloud virtual environment for FemtoClock®2 ultra-low phase noise synthesizer and jitter attenuator.
Video List
ニュース＆ブログ
| Benefits of a Point-of-Use Clock for Jitter Optimization | ブログ | 2021年4月27日 |
| Faster Timing Design and Accurate Performance Testing with Jitter Measurement Utility | ブログ | 2019年6月14日 |
| IDT、100Gと400Gアプリケーション向けに、 業界をリードする位相ノイズ性能の最新タイミング製品を発表 | ニュース | 2017年12月20日 |
| クラス最高の低ジッター性能で今日の要求の厳しいアプリケーションに応える IDT の12出力クロックジェネレータ | ニュース | 2016年8月2日 |