概要
説明
The CA91C142D (Universe II) is the industry's leading high-performance PCI to VME interconnect. It is fully compliant with the VME64 bus standard, and is tailored to support advanced PCI processors and peripherals. With a zero wait state implementation for write transactions, and the capability to support pre-fetch reads and multi-beat transactions, the Universe II provides high performance utilization of the PCI bus.
The Universe II eases development of VMEbus systems by providing direct connection to a local PCI bus. The device is ideally suited for CPU or peripheral boards functioning as both master and slave in the VMEbus system. Bridging is accomplished through a decoupled architecture with independent FIFOs for inbound (VME to PCI), outbound (PCI to VME), and DMA traffic. With this architecture, throughput is maximized without sacrificing bandwidth on either bus.
Designing with the Universe II eases the development of VME Single Board Computers (SBCs) and I/O peripherals targeting the military, aerospace, industrial automation and medical markets.
特長
- High performance 64-bit VME to PCI bus interconnect
- Industry-proven, reliable PCI to VME bridge
- Fully compliant, 32 or 64-bit, 33 MHz PCI bus interconnect
- Integral FIFOs for write posting to maximize bandwidth utilization
- Programmable DMA controller with Linked-List mode
- Flexible interrupt logic
- Automatic initialization for VME slave-only applications
- Extensive suite of VMEbus address and data transfer modes
- Register set programmable from both the PCI and VME64 buses
- Full VMEbus system controller functionality
- Sustained transfer rates of up to 60-70 Mbytes/s
- Support for RMWs, ADOH, PCI LOCK cycles, and semaphores
- Location monitors for broadcasting interrupts and message passing
- Commercial, industrial, and extended temperature variants
- IEEE 1149.1 JTAG
製品比較
アプリケーション
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| 分類 | タイトル | 日時 |
| データシート | PDF 1011 KB | |
| 製品変更通知 | PDF 128 KB | |
| 製品変更通知 | PDF 23 KB | |
| アプリケーションノート | PDF 164 KB | |
| マニュアル－ハードウェア | PDF 2.13 MB | |
| その他資料 | PDF 40 KB | |
| アプリケーションノート | PDF 188 KB | |
| デバイスエラッタ | PDF 62 KB | |
| 製品概要 | PDF 81 KB | |
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設計・開発
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Processing table
| PBGA | 313 | E | No | Tray | 3 | 1580.97 | ||
| PBGA | 313 | C | No | Tray | 3 | 957.07 | ||
| PBGA | 313 | C | Yes | Tray | 3 | 957.07 | ||
| PBGA | 313 | I | No | Tray | 3 | |||
| PBGA | 313 | I | Yes | Tray | 3 | 1100.31 |
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