概要

The 9FGV0831 is an 8-output very low power clock generator for PCIe Gen1–4 applications. The device has 8 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.

9FGV0831 - Block Diagram
9FGV0831 - Block Diagram
  • PCIe Gen1–4 compliant
  • 1.8 V operation: reduced power consumption
  • Outputs can optionally be supplied from any voltage between 1.05 and 1.8 V: maximum power savings
  • OE# pins: support DIF power management
  • LP-HCSL differential clock outputs: reduced power and board space
  • Programmable slew rate for each output: allows tuning for various line lengths
  • Programmable output amplitude: allows tuning for various application environments
  • DIF outputs blocked until PLL is locked: clean system start-up
  • Selectable 0%, -0.25% or -0.5% spread on DIF outputs: reduces EMI
  • External 25 MHz crystal; supports tight ppm with 0 ppm synthesis error
  • Configuration can be accomplished with strapping pins: SMBus interface not required for device control
  • 3.3 V tolerant SMBus interface works with legacy controllers
  • Space-saving 6x6 mm 48-pin VFQFPN; minimal board space
  • Selectable SMBus addresses: multiple devices can easily share an SMBus segment

ドキュメント

設計・開発

ECADモデル

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製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    型名
    9FGV0831CKILF
    circle廃止品
    memory
    view_in_ar
    		VFQFPN 48 I Yes Tray
    9FGV0831CKILFT
    circle廃止品
    memory
    view_in_ar
    		VFQFPN 48 I Yes Reel
    9FGV0831CKLF
    circle廃止品
    memory
    view_in_ar
    		VFQFPN 48 C Yes Tray
    9FGV0831CKLFT
    circle廃止品
    memory
    view_in_ar
    		VFQFPN 48 C Yes Reel
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