特長
- PCIe Gen5 phase jitter < 50fs rms
- PCIe Gen6 phase jitter < 40fs rms
- 3.3V operation
- Three 100MHz dedicated output pairs with individual OE# pins
- Two MXCLK output pairs multiplexable between 100MHz and 25MHz
- One 25MHz dedicated output pair
- 85Ω differential Low-Power HCSL (LP-HCSL) outputs eliminate 24 resistors, saving 39mm2 of area
- Three selectable SMBus addresses
- Supports 0%, -0.3% and -0.5% spread-spectrum amounts
- Side-Band Interface allows real-time hardware control of all output enables
- 5 × 5 mm, 40-VFQFPN
- -40°C to +85°C operating temperature range
説明
The 9SQ445 is a CK440Q Lite clock synthesizer for newer Intel-based server platforms. The 9SQ445 is a single-chip, PCIe Gen6 compliant device. It is designed to work as a complete clock solution, or in combination, with DB2000Q-compliant or other clock buffers to provide point-to-point clocks to multiple receiving agents.
パラメータ
| 属性 | 値 |
|---|---|
| Diff. Outputs | 6 |
| Diff. Output Signaling | LP-HCSL |
| Diff. Inputs | 1 |
| Power Consumption Typ (mW) | 400 |
| Supply Voltage (V) | 3.3 - 3.3 |
| Output Type | LP-HCSL |
| Xtal Freq (MHz) | 25 - 25 |
| Diff. Termination Resistors | 0 |
| Package Area (mm²) | 64 |
| Battery Backup | No |
| Battery Seal | No |
| CPU Supervisory Function POR | No |
| Crystal Frequency Trimming | No |
| Frequency Out Pin | No |
| Function | Generator |
パッケージオプション
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| VFQFPN | 5.0 x 5.0 x 0.9 | 40 | 0.4 |
適用されたフィルター
読込中
フィルター
ソフトウェア/ツール
サンプルコード
シミュレーションモデル
This video compares PCIe Gen3–7 common clock jitter filters with a typical 12kHz to 20MHz plot to highlight the differences in filtering approaches.