概要

The RC19024 is a 24-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19024 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.

RC190xxA - Block Diagram
RC19024A - Pin Assignment
RC190xxA - Block Diagram
RC19024A - Pin Assignment
  • LP-HCSL outputs eliminate up to 96 terminated resistors
  • PCIe Gen 1–7 compliance
  • Drive both source-terminated and double-terminated loads
  • Selectable output slew rate via SMBus
  • Supports 85Ω output impedance
  • Open-drain LOS (Loss-Of-Signal) indication output
  • Power down tolerance (PDT)
  • Flexible startup sequencing (FSS)
  • Automatic clock parking (ACP)
  • Dedicated OE# pins to control group output
  • 4-wire Side-Band interface and device daisy-chaining 
  • SMBus write protection features with 9 selectable addresses
  • 8mm × 8mm 100-GQFN package

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    Processing table
    Output Impedance
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    型名
    RC19024AGNQ#BB0
    circleアクティブ
    memory
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    サンプル入手可能
    今すぐ購入する
    		85 Tray -40 to 105°C 100 VFQFPN 3 サンプルを入手,
    RC19024AGNQ#KB0
    circleアクティブ
    memory
    view_in_ar
    		85 Reel -40 to 105°C 100 VFQFPN 3
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