概要

説明

The SLG46116 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46116. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit.

特長

  • Logic & Mixed Signal Circuits
  • Highly Versatile Macrocells
  • Read Back Protection (Read Lock)
  • 1.8V (±5%) to 5V (±10%) Supply
  • Operating Temperature Range -40 °C to 85 °C
  • Soft-Start 1.25 A P-FET Power Switch
  • Pb-Free / Halogen-Free / RoHS compliant

Macrocells Overview

  • Two Analog Comparators (ACMP);
  • Voltage References (Vref);
  • Four Combinatorial Look Up Tables (LUTs):
    • Two 2-bit LUTs;
    • Two 3-bit LUTs;
  • Seven Combination Function Macrocell:
    • Two Selectable DFF/Latch or 2-bit LUTs;
    • Two Selectable DFF/Latch or 3-bit LUTs;
    • One Selectable Pipe Delay or 3-bit LUT:
      • Pipe Delay - 8 stage / 2 output;
    • One Selectable Counter/Delay or 4-bit LUT;
    • One Programmable Delay / Deglitch Filter;
  • Three Counter / Delay Generators (CNT/DLY):
    • Three 8-bit counter/delays with external clock/reset;
  • Four D Flip-Flop / Latches (DFF) (Part of Combination Function Macrocell);
  • Pipe Delay - 8 stage/2 output (Part of Combination Function Macrocell);
  • One Bandgap;
  • Power On Reset(POR);
  • Trimmed RC Oscillator (RC OSC);
  • Soft-Start P-FET Power Switch:
    • Power Switch IDS: 1.25 A;
    • Slew Rate Control;
    • VIN: 1.5 V to 5.5 V;
    • Low RDSON:
      • 28.5 mΩ @ 5.0 V;
      • 36.4 mΩ @ 3.3 V;
      • 44.3 mΩ @ 2.5 V;
      • 60.8 mΩ @ 1.8 V;
      • 77.6 mΩ @ 1.5 V.

製品比較

アプリケーション

アプリケーション

  • Power Sequencing with complex analog control
  • Power Plane component size reduction project
  • LED Driver
  • Haptic Motor Driver
  • System RESET with Power Switch

ドキュメント

設計・開発

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