概要

説明

The ISL73002SEH is a radiation hardened and SEE hardened high-efficiency monolithic, synchronous buck regulator with integrated MOSFETs. This single-chip power solution operates over an input voltage range of 3V to 5.5V and provides a tightly regulated output voltage that is externally adjustable from 0.8V to ~85% of the input voltage. Output load current capability is primarily determined by PVIN voltage with up to 22A for a single IC at PVIN ≤ 5.5V for TJ ≤ +125 °C. Two ISL73002SEH devices, configured to current share, can provide up to 38A of total output current at PVIN ≤ 5.5V for TJ ≤ +125 °C assuming ±27% worst-case current share accuracy. The ISL73002SEH uses peak current-mode control with integrated error amp compensation and pin-selectable slope compensation. The switching frequency is also pin selectable to either 1MHz or 500kHz. Two devices can be synchronized 180° out-of-phase to reduce input RMS ripple current. High integration makes the ISL73002SEH an ideal choice to power small form factor applications. Two devices can be synchronized to provide a complete power solution for large-scale digital ICs, like field-programmable gate arrays (FPGAs) that require separate core and I/O voltages.

特長

  • DLA SMD 5962-12202
  • Maximum output current (Single Phase):
    • 22A with external Schottky (TJ ≤ 125 °C, PVIN ≤ 5.5V)
    • 18A (TJ ≤ 125 °C, PVIN ≤ 5.5V)
    • 14A (TJ ≤ 125 °C, PVIN ≤ 6.2V)
    • 12A (TJ ≤ 150 °C, PVIN ≤ 6.2V)
  • Maximum output current (Dual Phase)
    • 38A (27% worst case current sharing)
  • 1MHz or 500kHz switching frequency
  • 3V to 6.2V supply voltage range
  • ±1% reference voltage (line, load, temperature, and rad)
  • Redundancy/Junction isolation: Exceptional SET performance
  • Excellent transient response
  • High efficiency >90%
  • Two ISL73002SEH synchronization, inverted-phase
  • Comparator input for enable and power-good
  • Input undervoltage, output undervoltage, and adjustable output overcurrent protection
  • QML qualified per MIL-PRF-38535
  • Full military temperature range operation (-55 °C to +125 °C)
  • Radiation environment
    • LDR (0.01rad(Si)/s): 50krad(Si)
  • SEE hardness
    • SEL and SEB LETTH 86.4MeV/mg/cm2
    • SEFI LETTH 43MeV/mg/cm2
    • SET LETTH 86.4MeV/mg/cm2

製品比較

アプリケーション

アプリケーション

  • FPGA, CPLD, DSP, CPU core, and I/O voltages
  • Low-voltage, high-density distributed power systems

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